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Integrated Circuit Systems, Inc.
AV9155
Low Cost 20-Pin Frequency Generator
General Description
The AV9155 is a low cost frequency generator designed specifically for desktop and notebook PC applications. Its CPU clocks provide all necessary CPU frequencies for 286, 386 and 486 systems, including support for the latest speeds of processors. The device uses a 14.318 MHz crystal to generate the CPU and all peripheral clocks for integrated desktop motherboards. The dual 14.318 MHz clock outputs allows one output for the system and one to be the input to an ICS graphics frequency generator such as the AV9194. The CPU clock offers the unique feature of smooth, glitch-free transitions from one frequency to the next, making this ideal device to use whenever slowing the CPU speed. The AV9155 makes a gradual transition between frequencies, so that it obeys the Intel cycle-to-cycle timing specification for 486 systems. The simultaneous 2X and 1X CPU clocks offer controlled skew to within 1.5ns (max) of each other. ICS offers several versions of the AV9155. The different devices are shown below:
Features

Compatible with 286, 386, and 486 CPUs Supports turbo modes Generates communications clock, keyboard clock, floppy disk clock, system reference clock, bus clock and CPU clock Output enable tristates outputs Up to 100 MHz at 5V or 3.3V 20-pin DIP or SOIC All loop filter components internal Skew-controlled 2X and 1X CPU clocks Power-down option
ICS has been shipping motherboard frequency generators since April 1990, and is the leader in the area of multiple output clocks on a single chip. The AV9155 is a third generation device, and uses ICSs patented analog CMOS phase-locked loop technology for low phase jitter. ICS offers a broad family of frequency generators for motherboards, graphics and other applications, including cost-effective versions with only one or two output clocks. Consult ICS for all of your clock generation needs.
PART
DESCRIPTION
AV9155C-01 Motherboard clock generator with 16 MHz BUS CLK AV9155C-02 Motherboard clock generator with 32 MHz BUS CLK AV9155C-23 Includes PentiumTM frequencies AV9155C-36 Features a special 40 MHz SCSI clock
Block Diagram
Pentium is a trademark of Intel Corporation.
9155 Rev B 8/24/98
AV9155
Pin Configuration
20-Pin DIP or SOIC
20-Pin DIP or SOIC
Pin Descriptions for AV 9155-01, 9155-02
PIN N UM BER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 X2 X1 VDD GN D 16 M Hz/32 M Hz 24 M Hz 12 M Hz AGN D OE FS2 PD# 14.318 M Hz 14.318 M Hz GN D VDD 2XC PU C PU FS1 FS0 PIN N AM E 1.843 M Hz TYPE O utput O utput Input O utput O utput O utput Input Input Input O utput O utput O utput O utput Input Input 1.84 M Hz clock output. C rystal connection. C rystal connection. Digital power supply (3.3V or 5.0V). Digital Ground. 16 M Hz (-01) or 32 M Hz (-02) clock output. 24 M Hz floppy disk/combination I/O clock output. 12 M Hz keyboard clock output. Analog ground (original version). O utput enable. Tristates all outputs when low. (Has internal pull-up.) C PU clock frequency select #2. (Has internal pull-up.) Power-down. Shuts off entire chip when low. (Has internal pull-up.) 14.318 M Hz reference clock output. 14.318 M Hz reference clock output. Digital ground. Digital power supply (3.3V or 5.0V). 2X C PU clock output. 1X C PU clock output. C PU clock frequency select #1. (Has internal pull-up.) C PU clock frequency select #0. (Has internal pull-up.) DESC RIPTIO N
2
AV9155
Functionality - AV9155-01
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8 16 32 40 50 66.66 80* 100* CPU (Pin 18) 4 8 16 20 25 33.33 40* 50*
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.843* BUSCLK (Pin 6) 16* FDCLK (Pin 7) 24* KBCLK (Pin 8) 12*
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*5V only.
Functionality - AV9155-02
CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1
(Using 14.318 MHz input. All frequencies in MHz.) PERIPHERAL CLOCKS
2XCPU (Pin 17) 8 16 32 40 50 66.66 80* 100* CPU (Pin 18) 4 8 16 20 25 33.33 40* 50*
COMMCLK (Pin 1) 1.843* BUSCLK (Pin 6) 32* FDCLK (Pin 7) 24* KBCLK (Pin 8) 12*
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*5V only.
Frequency Transitions
A key feature of the AV9155 is its ability to provide smooth, glitch-free frequency transitions on the CPU and 2XCPU clocks when the frequency select pins are changed. These frequency transitions do not violate the Intel 486 specification of less than 0.1% frequency change per clock period.
Using an Input Clock as Reference
The AV9155 is designed to accept a 14.318 MHz crystal as the input reference. With some external changes, it is possible to use a crystal oscillator or clock input. Please see application note AN04 for details on driving the AV9155 with a clock.
3
AV9155
Pin Configuration
20-Pin DIP or SOIC
20-Pin DIP or SOIC
Pin Descriptions for AV9155-23, -36
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 X2 X1 VDD GND 16 MHz/15 MHz 24 MHz 12 MHz AGND OE FS2 PD# 14.318 MHz 14.318 MHz GND VDD 2XCPU CPU FS1 FS0 PIN NAME 1.843/40 MHz TYPE Output Output Input Output Output Output Input Input Input Output Output Output Output Input Input DESCRIPTION 1.84 MHz (-23)/40 MHz SCSI (-36) clock output. Crystal connection. Crystal connection. Digital power supply (+5V) Digital ground. 16 MHz (-23)/15 MHz (-36) clock output. 24 MHz floppy disk/combination I/O clock output. 12 MHz keyboard clock output. Analog ground (original version). Output enable. Tristates all outputs when low. (Has internal pull-up.) CPU clock frequency select #2. (-23 has internal pull-up.) Power-down. Shuts off entire chip when low. (Has internal pull-up.) 14.318 MHz reference clock output. 14.318 MHz reference clock output. Digital ground. Digital power supply (3.3V or 5.0V). 2X CPU clock output. 1X CPU clock output. CPU clock frequency select #1. (-23 has internal pull-up.) CPU clock frequency select #0. (-23 has internal pull-up.)
4
AV9155
Functionality - AV9155-23
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 75* 32 60 40 50 66.66 80* 52 CPU (Pin 18) 37.5* 16 30 20 25 33.33 40* 26
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.843 BUSCLK (Pin 6) 16* FDCLK (Pin 7) 24 KBCLK (Pin 8) 12
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*5V only
Functionality - AV9155-36
(Using 14.318 MHz input. All frequencies in MHz.) CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8 16 60 40 50 66.66 80* 100* CPU (Pin 18) 4 8 30 20 25 33.33 40* 50*
PERIPHERAL CLOCKS
SCSICLK (Pin 1) 40* BUSCLK (Pin 6) 15* FDCLK (Pin 7) 24* KBCLK (Pin 8) 12*
REFERENCE CLOCKS
REFCLK1 (Pin 13) 14.318 REFCLK2 (Pin 14) 14.318
*5V only
5
AV9155
Absolute Maximum Ratings
VDD referenced to GND . . . . . . . . . . . . . . . . . . . . . . 7V Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V Operating temperature under bias. . . . . . . . . . . . . . . . 0C to +70C Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics at 5V
VDD = 4.0 to 5.5V (5V +10%/-20%); TA=0C to 70C unless otherwise stated
PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage Output High Voltage Output High Voltage Output High Voltage Supply Current Supply Current, Power-Down Output Frequency Changeover Supply and Temperature Short circuit current Pull-up resistor value Input Capacitance Load Capacitance Output Rise time, 0.8 to 2.0V Rise time, 20% to 80% VDD Output Fall time, 2.0 to 0.8V Fall time, 80% to 20% VDD Duty cycle Duty cycle, reference clocks Jitter, one sigma Jitter, absolute Jitter, absolute Input Frequency Clock skew between CPUand 2XCPU outputs Frequency Transition time SYMBOL V IL V IH ILL IIH VOL VOH VOH VOH Icc ICDSTBY FD Isc Rpu Ci CL tr tr tr tf dt dt fji1s tjab tjab fi Tsk tft From 8 to 100 MHz DC Characteristics TEST CONDiTIONS VDD=5V VDD=5V VIN=0V VIN=VDD IOL=4mA IOH=-lnlA, V DD=5.OV IOH=-4nIA, VDD=5.OV I H=-8mA No load No load
1
MIN 2.0 -1 5uA
TYP
MAX 0.8
UNITS V V A
5 0.4 VDD-.4V VDD-.8V 2.4 40 0.7 0.002 25 40 680 10 20 40/60 40/60 1 2 1 2 48/52 43/57 0.8 2 14.318 0.5 15 1 20 2 4 2 4 60/40 60/40 2.5 5 700 80 1.5 0.01
A V V V V mA mA % mA k p
With respect to typical frequency Each output clock Except Xl, X2 Pins Xl, X2 AC Characteristics 25pF load 25pF load 25pF load 25pF load 25pF load 25pF load As compared with clock period 16-100 MHz clocks
ns ns ns ns % % % % ps MHz ns ms
Notes: 1 All clocks on AV9155-xx running at highest possible frequencies. Power supply current can change substantially with different mask configurations. Consult ICS. 6
AV9155
Actual Output Frequencies
(Using 14.318 MHz input. All frequencies in MHz.) AV9155-01 and AV9155-02 CLOCK#2 CPU and 2XCPU
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 7.50 15.51 32.22 40.09 50.11 66.82 80.18* 100.23* CPU (Pin 18) 3.75 7.76 16.11 20.05 25.06 33.41 40.09* 50.11*
AV9155-23 CPU CLOCK
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 75.170* 31.940 60.136 40.090 50.113 66.476 80.181* 51.903* CPU (Pin 18) 37.585* 15.970 30.068 20.045 25.057 33.238 40.091* 25.952*
*5V only.
*5V only.
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.846 BUSCLK (Pin 6) 32.01 or 16.00 FDCLK (Pin 7) 24.00 KBCLK (Pin 8) 12.00
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 1.846 BUSCLK (Pin 6) 16.00 FDCLK (Pin 7) 24.00 KBCLK (Pin 8) 12.00
AV9155-36 CPU CLOCK
FS2 (Pin 11) 0 0 0 0 1 1 1 1 FS1 (Pin 19) 0 0 1 1 0 0 1 1 FS0 (Pin 20) 0 1 0 1 0 1 0 1 2XCPU (Pin 17) 8.054 16.002 59.875 39.886 50.113 66.476 80.181* 100.226* CPU (Pin 18) 4.027 8.001 29.936 19.943 25.057 33.238 40.091* 50.113*
PERIPHERAL CLOCKS
COMMCLK (Pin 1) 40.00 BUSCLK (Pin 7) 15.00 FDCLK (Pin 6) 24.00 KBCLK (Pin 8) 12.00
7
AV9155
AV9155 Recommended External Circuit
Notes: 1. ICS recommends the use of an isolated ground plane for the AV9155. All grounds shown on this drawing should be connected to this ground plane. This ground plane should be connected to the system ground plane at a single point. Please refer to AV9155 Board Layout Diagram. 2. A single power supply connection for all VDD lines at the 2.2F decoupling capacitor is recommended to reduce interaction of analog and digital circuits. The 0.1F decoupling capacitors should be located as close to each VDD pin as possible. 3. A 33 series termination resistor should be used on any clock output which drives more than one load or drives a long trace (more than about two inches), especially when using high frequencies (>50 MHz). This termination resistor is put in series with the clock output line close to the clock output. It helps improve jitter performance and reduce EMI by damping standing waves caused by impedance mismatches in the output clock circuit trace. 4. The ferrite bead does not enhance the performance of the AV9155, but will reduce EMI radiation from the VDD line.
8
AV9155
AV9155 Recommended Board Layout
This is the recommended layout for the AV9155 to maximize clock performance. Shown are the power and ground connections, the ground plane, and the input/output traces. Use of the isolated ground plane and power connection, as shown, will prevent stray high frequency ground and system noise from propagating through the device. When compared to using the system ground and power planes, this technique will minimize output clock jitter. The isolated ground plane should be connected to the system ground plane at one point, near the 2.2F decoupling cap. For lowest jitter performance, this isolated ground plane should be kept away from clock output pins and traces. Keeping the isolated ground plane area as small as possible will minimize EMI radiation. Use a sufficient gap between the isolated ground plane and system ground plane to prevent AC coupling. The ferrite bead in the VDD line optional, but will help reduce EMI. The traces to distribute the output clocks should be over a system ground or power supply plane. The trace width should be about two times the thickness of the PC board between the trace and the underlying plane. These guidelines help minimize clock jitter and EMI radiation. The traces to distribute power should be as wide as possible.
9
AV9155
20-Pin DIP Package
Ordering Information
AV9155-01N20, AV9155-02N20, AV9155-23N20, AV9155-36N20
Example:
ICS XXXX-PPP M X#W
Lead Count & Package Width Package Type
Lead Count=1, 2 or 3 digits W=.3 SOIC or .6 DIP; None=Standard Width N=DIP (Plastic#) T&R=Tape and Reel
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix
ICS, AV=Standard Device
Notes: Tape and reel packaging should be ordered with the suffix T&R. For instance, if the -01 in DIP and tape & reel is required, order the part as AV9155-01CN20T&R. 10
AV9155
LEAD COUNT DIMENSION L
14L 0.354
16L 0.404
18L 0.454
20L 0.504
24L 0.604
28L 0.704
32L 0.804
Ordering Information
AV9155-01W20, AV9155-02M20, AV9155-23M20, AV9155-36M20
Example:
ICS XXXX-PPP M X#W
Lead Count & Package Width Package Type
W=SOIC Lead Count=1, 2 or 3 digits W=.3 SOIC or .6 DIP; None=Standard Width
T&R=Tape and Reel
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 or 4 digit numbers) Prefix
ICS, AV=Standard Device
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